In electronic circuits and devices for high speed operations, semiconductor substrates with conducting channels are used with gate structures. Voltage applied to the gate structure induces a field effect to modulate the carrier density in the channel. The switching speed of such a field effect device is mainly determined by the RgCg time constants in the input terminals and ultimately determined by the transit time of carriers from source to drain. Here, the source and drain are in contact with the two end regions of the channel and define a channel length and a channel width. Therefore, the space available to accommodate the gate is limited to within the channel region (or channel length). To reduce the unwanted capacitance between the gate to the source (Cgs) and gate to the drain (Cgd) and hence the total gate capacitance Cg≈Cgs+Cgd, the length of gate (L) contacting the channel region must be made small. However, for a gate having a small gate length L, the gate series resistance Rg will be large causing a relatively large product of RgCg. This is because Rg=r (W/L×H), where W is the width and H is the height (or thickness) of the gate. In order to reduce the unwanted Rg, the cross sectional area (given by product L×H) of the gate should be increased and this is conveniently achieved by adopting a T-gate structure or an Γ-gate structure. In the T-gate or Γ-gate structure, the vertical portion of the gate contacting the channel is often called the stem or foot whereas the horizontal portion disposed on top of the stem is called the head. Since the head is raised over the channel, the unwanted Cg can be maintained to be small but with a significantly reduced Rg. Therefore, in the microelectronic fabrication and processing, it is critical to achieve T-gates or Γ-gates on semiconductor substrates. It is noted in some processes the gates may have a shape of T and are also called Y-gates.
To achieve both the low resistance Rg and stable operation, metals including Au, Ti and Pt in sandwich form are often used to form the gates. Etching methods are often more difficult to achieve the gate with a short length of stem especially on semiconductor substrates having high carrier mobilities, such as InP, GaAs, GaN, InGaAs, AlGaAs, InGaN, AlGaN and InGaP etc. This is due to the compatibility of these semiconductors to the etching solutions or agents used. Therefore, instead of etching, a lift-off process is often used to create the required T-gate or Γ-gate.
Using e-beam writing, the T-gate or Γ-gate may be obtained by using a three-resist configuration. The resists used in e-beam lithography often have molecular weights larger than the resists used in optical lithography. In the three-resist e-beam configuration, the first resist contacting the substrate is selected to have lower sensitivity to the e-beam compared to the second resist layer deposited on top of the first resist layer. A third resist layer is applied on the second resist layer and this third resist layer again has lower sensitivity to the electron beam. After being exposed to a narrow electron beam of a high dose and superimpose with a wider electron beam with a lower dose, a wider region in the second resist may be achieved after the development. However, the above method requires the provision of different resists layers having different sensitivities and thus different molecular chemistry and intermixing difficulties. In order to solve the intermixing problem and to achieve the fine length cavity for the stem, process involving applying, first exposing and developing the first resist of one sensitivity prior to application of second and third resists with different sensitivities has been proposed. A second exposing and developing will create a gate cavity for metal deposition and lift-off. It should be pointed out in production environment, most of the e-beam writers used operates in sequential manner and the writing time is long.
Methods have been proposed for the creation of T-gates or Γ-gates using optical lithography where resists used have smaller molecular weights. In order to obtain small length of stem compared to the head, a first resist layer is applied, exposed and developed to provide a cavity for the stem. After the developing, the first resist is treated to enhance its chemical properties before applying subsequent resist layers, which will be exposed and developed sequentially to create cavity for the head. In this method, it is required that the intermixing between the first resist and the second resist must be kept as small as possible. However, the intermixing may not be avoided by using the same materials for the first resist and the second resist. Even when resists with different molecules or chemistry are employed, the intermixing still cannot be eliminated completely. In other method, it has been proposed to utilize a positive resist for the first layer to define stem or foot cavity and a negative resist to define the cavity for the head. However, the adoption of two resists of different types often lead to difficulties in selecting processing conditions compatible to each other. It is thus highly desirable to have method for the creation of cavities for the T-gates or Γ-gates without any intermixing problems and preferably employing resists of the same materials and chemistry.